--
-- VHDL Architecture Fietscomputer_lib.i_multiplexer.v1
--
-- Created:
--          by - jcmooije.UNKNOWN (dtp7985)
--          at - 14:59:39  4-06-2010
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_UNSIGNED.all;

ENTITY fc_multiplexer IS
  PORT( 
  i_A      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_B      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_C      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_D      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_E      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_F      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_G      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  i_H      : IN     STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
  inp_sel  : IN     STD_LOGIC_VECTOR( 2 DOWNTO 0);
  x        : OUT    STD_LOGIC_VECTOR(63 DOWNTO 0)
);
END fc_multiplexer ;

--------------------------------------------
---------------------------------------------

ARCHITECTURE v1 OF fc_multiplexer IS
BEGIN
  
  x <= 
  i_A WHEN inp_sel = 1 ELSE
  i_B WHEN inp_sel = 2 ELSE
  i_C WHEN inp_sel = 3 ELSE
  i_D WHEN inp_sel = 4 ELSE
  i_E WHEN inp_sel = 5 ELSE
  i_F WHEN inp_sel = 6 ELSE
  i_G WHEN inp_sel = 7 ELSE
  i_H;

  
  
  
  
END ARCHITECTURE v1;


